![]() ![]() ![]() The Intel® Infrastructure Processing Unit (Intel IPU) E2000 is Intel’s first ASIC IPU device, a 200G product co-designed with Google and in production as of 2022. In response to this emerging security issue, the Intel team details a source-agnostic fault-injection-attack resistant AES-256 accelerator with marked improvement in minimum-time-to-disclosure (MTD) against laser and undervoltage attacks, compared to an unprotected AES engine.įull research papers are only available to conference attendees, but readers can find a preview of Intel Labs’ efforts below. These malicious attacks can be used to achieve a number of objectives, including the extraction of cryptographic keys, gaining privileged access, and modifying parameters in deep neural networks. Researchers will also present a live demonstration showing how fault-injection attacks can be mitigated by Intel Labs’ novel techniques detailed in the paper, “A 100Gbps Fault-Injection Attack Resistant AES-256 Engine with 99.1-to-99.99% Error Coverage in Intel 4 CMOS.” Fault-injection attacks (FIA), as depicted in Figure 1, are physical attacks that inject faults using lasers or glitches on the clock or power supply. A representation of fault-injection attacks on an AES engine. With an IPU, customers can better utilize resources with a secure, programmable, stable solution that enables them to balance processing and storage.įigure 1. IPUs can manage storage traffic which reduces latency while efficiently using storage capacity via a diskless server architecture. Cloud operator scan offload infrastructure tasks to the IPU maximizing CPU utilization and revenue. It features the strong separation of infrastructure functions and tenant workload allows tenants to take full control of the CPU. This 200GbE Intel IPU was co-designed with Google and is in production as of 2022. Notably, Intel was invited to present its industry paper, “An In-depth Look at the Intel IPU E2000”, detailing the Intel® Infrastructure Processing Unit (Intel® IPU) E2000, formerly code-named Mount Evans. These contributions include advanced building blocks for power delivery and management and Wi-Fi transceivers in Intel platforms. Additionally, researchers from Intel Labs are participating in special event panels, forums, a short course, and a tutorial. Intel is pleased to present seven papers at this global forum for advances in solid-state circuits and systems-on-a-chip. The conference will be held in San Francisco, California. This year, the IEEE International Solid-State Circuits Conference (ISSCC) will run from February 19-23. Intel’s contributions include advanced building blocks for power delivery and management and Wi-Fi transceivers in Intel platforms as well as a fault-injection attack-resistant AES engine and details on the Intel® Infrastructure Processing Unit E2000.Intel is excited to contribute seven papers, as well as special event panels, forums, a short course, and a tutorial.The IEEE International Solid-State Circuits Conference (ISSCC), 2023, runs from February 19-23 in San Francisco, California.Scott Bair is a key voice at Intel Labs, sharing insights into innovative research for inventing tomorrow’s technology.
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